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B.TECH. IN ELECTRONICS ENGINEERING (VLSI DESIGN AND TECHNOLOGY)coretheory

VLSI TESTING

ECE 3128

Syllabus

  • 01Introduction to testing and testability
  • 02Physical Faults and their modeling
  • 03Fault collapsing
  • 04Fault Simulation
  • 05Critical Path Tracing
  • 06Testing of combinational circuits
  • 07Various types of faults
  • 08Functional v/s structural approach to testing
  • 09test vector generation for a single stuck-at-fault in combinational logic
  • 10Algebraic algorithms
  • 11Structural algorithms
  • 12Testability Techniques
  • 13controllability and observability
  • 14ad-hoc and structured approaches to DFT
  • 15scan-path testing
  • 16Testing of sequential circuits
  • 17Test pattern generation for sequential circuits
  • 18Exhaustive
  • 19Signatures and self test
  • 20Testing with random patterns
  • 21LFSRs
  • 22random test generation and response compression
  • 23Signature analysis
  • 24Online self test

References

  • M. L. Bushnell and V. D. Agrawal, "Essentials of testing for digital, memory and mixed-signal VLSI circuits", Boston: Kluwer Academic Publishers, 2000.
  • Abramovici, M. A. Breuer, and A.D. Friedman, "Digital Systems Testing and Testable Design", Piscataway, New Jersey: IEEE Press, 1994.
  • Miczo, "Digital Logic Testing and simulation". New York: Harper & Row, 1986.
  • P.K. Lala, "Fault Tolerant & Fault Testable hardware Design", BS Publications, 1998
  • Stanley L. Hurst, “VLSI Testing: digital and mixed analogue digital techniques” Pub:Inspec/IEE, 1999.
Credits Structure
3Lecture
0Tutorial
0Practical
3Total